1. Field of the Invention
The present invention relates to a system of selector circuits for selecting one out of a plurality of disk devices, such as, for example, different types of plural magnetic disk devices, connected to a controller through common control signal lines, and more particularly, to a system of disk device selector circuits enabling a disk controller to correctly recognize the type of the disk device that has been selected by and connected to the same and thereby to correctly set up the data transfer speed between the disk device and the controller.
2. Description of the Prior Art
With the rapid advancement of the magnetic recording technology in recent years, and, specifically, owing to increase in the recording density of the magnetic recording media, improvement in the recording formats, and betterment of performances of the magnetic recording devices, magnetic disk devices of various types have come into wide use. Since these devices have different data transfer rates, recording capacity, and recording formats on account of different recording density of the magnetic diskette as their object of reading and writing, they have to be provided with different types of control for reading data suitable for different types when they are connected to a data transfer system. If such control should be provided individually for each type, it would not only reduce the data processing speed, but also necessitate providing a dedicated controller for each device, and this was a problem with the prior art device in respect of time, space, and cost.
Therefore, there have been proposed various circuit designs which connect a controller, capable of selecting any device from a plurality of magnetic disk devices and exercising various controlling operations, with the selected disk device. FIG. 1 is a block diagram showing an example of such a system of disk device selector circuits of the prior art. Referring to the figure, a disk controller 1 and each of disk devices 2 and 3 of different types, such as types (A) and (B), are connected via control signal lines 5-8. The controller 1 is provided therein with a device selection controlling portion 10 and selection signal transmitting gates 11, 12, 13, and 14 interposed between the device selection controlling portion 10 and the control signal lines 5-8. The disk device 2 of the type (A) is provided therein with an address setting circuit 20 and a selection signal receiving gate 25, and the address setting circuit 20 is provided therein with address setting switches 21-24 which are respectively connected to branch lines 5A-8A of the control signal lines 5-8. The disk device 3 of the type (B) is also provided therein with an address setting circuit 30 and a selection signal receiving gate 35, the address setting circuit 30 being provided therein with address setting switches 31-34 connected respectively to branch lines 5B-8B of the control signal lines 5-8. From the fact that four each of selection signal transmitting gates 11-14 and control signal lines 5-8 are provided in the present example, it is known that there are provided totally four sets of disk devices, including, in addition to the above, third and fourth disk devices of different types such as types (C) and (D). Since the additional two disk devices have similar internal structure and external connections to the disk devices 2 and 3, these are omitted from the illustration.
The internal organization of the disk controller 1 shown above in FIG. 1 is formed as shown in a block diagram of FIG. 2. Referring to the figure, the disk controller 1 includes a switching means 101 for ON-OFF operation for selecting one from the disk devices 2, 3, . . . , an input bus 102 for outputting to selection controlling means 10 a two-bit address signal provided by software in a computer or the like not shown based on an ON signal output from the switching means 101 then in the ON state, a register 17 which constitutes the selection controlling means 10 and in which the address (two-bit) signal is established by the software through the input bus 102, and a decoder 18 for outputting the address signal established in the register 17 as selection signals S1-S4 to each disk device 2, 3, . . . The transmission gates 11-14 to which the selection signals S1-S4, the outputs of the decoder 18, are input are more particularly formed of AND circuits as shown in FIG. 2, and these transmission gates 11-14 formed of AND circuits are so arranged that their two input terminals each are short-circuited into one input signal line. The disk controller 1 further includes a transmission line 103 for transmitting the data signal output from the disk device 2 or 3, a data receiving circuit 105 for receiving the data signal, and a disk control unit 106 for outputting, upon receipt of the data signal, a control signal to the selected disk device 2 or 3 through the register 17 and the decoder 18.
The two-bit device addressing signal set up in the register 17 is output to the disk device 2 or 3 through the decoder 18. Therefore, the selection signals S1-S4 are arranged to be in such condition that only one thereof is in the ON state, i.e., the enabled state.
Operation of the prior art system of selector circuits with described structure will be described in the following. An address signal for selecting one disk device from a plurality of disk devices of, for example, types (A)-(D) is generally output as a binary digital signal. In the example shown in FIG. 1, however, selection signals S1, S2, S3, and S4, which correspond to decoded signals of an address signal, are output from the device selection controlling portion 10. That is, in the case where the disk device 2 of type (A) is to be selected, the device selection controlling portion 10 outputs signals in which the selection signal S1 is set to logical "1" and selection signals S2-S4 are set to logical "0". And, in the case where the disk device 3 of type (B) is to be selected, the device selection controlling portion 10 outputs signals in which the selection signal S2 is set to logical "1" and signals, S1, S3, and S4 are each set to logical "0". Further, in the case where the third disk device of type (C) which is not shown is to be selected, the device selection controlling portion 10 outputs signals in which the selection signal S3 is set to logical "1" and signals, S1, S2, and S4 are set to logical "0", and in the case where the fourth disk device of type (D), not shown, is to be selected, the device selection controlling portion 10 similarly outputs signals in which the selection signal S4 is set to logical "1" and signals S1-S3 are set to logical "0". In this connection, such an expression will hereinafter be used as, "an address signal of the bit pattern for selecting an arbitrary one out of a plurality of magnetic disk devices is delivered", including the case as described above where selection signals corresponding to decoded signals of an ordinary address signal are delivered. In the above described example, the bit pattern for selecting the disk device 2 of type (A) is "1000". It is a matter of course that a two-bit digital signal can be delivered as an ordinary address signal for selecting, for example, one disk device out of four devices, where, however, the manner of connections of the setting switches in the address setting circuit will be different from that in FIG. 1.
In the case where the above mentioned selection signals S1-S4 are delivered via selection signal transmitting gates 11-14, if it is arranged, as shown in FIG. 1, such that, for example, only the setting switch 21 in the disk device 2 of type (A) connected with the branch line 5A of the control signal line 5 is closed, and, such that, for example, only the setting switch 32 in the disk device 3 of type (B) connected with the branch line 6B of the control signal line 6 is closed, then, the disk device 2 of type (A) will be selected when the device selection controlling portion 10 sets the selection signal S1 to logical "1" causing the transmitting gate 11 to output a signal of logical "1" through the branch line 5A of the control signal line 5 to the receiving gate 25, and the disk device 3 of type (B) will be selected when the device selection controlling portion 10 sets the selection signal S2 to logical "1" causing the transmitting gate 12 to output a signal of logical "1" through the branch line 6B of the control signal line 6 to the receiving gate 35.
There are concrete examples of the disk devices temporarily described above as those of types (A)-(D) such as, if flexible disk devices are taken by way of example, a double density flexible disk device (hereinafter to be referred to as a 2DFDD) capable of reading data from a double density flexible disk (hereinafter to be referred to as a 2D disk) and capable of writing data in the 2D disk and a high density flexible disk device (hereinafter to be referred to as an HDFDD) capable of reading data from a high density flexible disk (hereinafter to be referred to as an HD disk) and capable of writing data in the HD disk. In the case where a number of various types of disk devices inclusive of such a 2DFDD and HDFDD are simultaneously connected to a disk controller, the data transferring rates between the disk controller 1 and each of the disk devices 2, 3 are generally different in each of the operations for the 2DFDD to read out data from a 2D disk, for the HDFDD to read out data from an HD disk, and for the HDFDD to read out data from a 2D disk. Therefore, the disk controller 1 must read the type of the disk device which has been selected by and connected to the same and have the data transfer rate suitable for that type set up by a data receiving circuit, which is not shown, for reading data out of the disk device. When, in such a case, the data stored in the sheet was read out at a wrong rate, there were sometimes produced such errors as loss of data.
Since the prior art system of selector circuits was structured as described above, the type of the disk device selected by and connected to the disk controller was not indicated from the disk device to the disk controller. Therefore, it was difficult to have the data transfer rate set up by the data receiving circuit provided in the disk controller to the right value matched with the selected and connected disk device. And, as described above, errors were sometimes produced when data were read at a wrongly set data transfer rate resulting in malfunction or troubles of the overall system.
As a measure to overcome the described problem, there is proposed "RECORDING MEDIUM READ/WRITE CONTROL SYSTEM", U.S. patent application Ser. No. 596,274, now U.S. Pat. No. 4,651,238, applied by the present applicant, MITSUBISHI DENKI KABUSHIKI KAISHA. That is, in that control system, it is enabled that different types of magnetic disk devices are recognized and read control of data suited to each of the types is exercised. In the system, there are provided type recognizing switches as the means for recognizing different types of the disk devices, and it is adapted such that data read control corresponding to the specific type of the disk device is exercised according to the state of setting of the switches.